|
c1fe54ccd5
|
Attempt alternative to total register overhaul
|
2025-02-03 15:05:32 -05:00 |
|
|
ac1ee793ab
|
Use fewer operations and encode operand types in the instruction
|
2025-01-13 09:49:08 -05:00 |
|
|
0510e18060
|
Begin implementing typed 64-bit instructions
|
2025-01-13 06:01:38 -05:00 |
|
|
e9bd9b37b0
|
Make runtime improvements
|
2025-01-08 04:21:01 -05:00 |
|
|
9ae923febd
|
Optimize; Revert to branch-style comparisons for performance
|
2024-12-14 00:45:49 -05:00 |
|
|
1777ad298b
|
Experiment wih more optimizations
|
2024-12-11 09:26:38 -05:00 |
|
|
20f451fe6c
|
Experiment with optimizations and benches
|
2024-12-11 06:49:43 -05:00 |
|
|
a9e867aaab
|
Continue rewrite of instructions and operations
|
2024-12-09 07:01:07 -05:00 |
|
|
cc069df7ee
|
Continue instruction rewrite
|
2024-12-08 08:01:15 -05:00 |
|
|
a94cc11069
|
Refactor to use 64-bit instructions
|
2024-11-26 07:14:30 -05:00 |
|