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42 Commits

Author SHA1 Message Date
a5d2e7d869 Clean up 2025-02-08 17:55:26 -05:00
3af1b64820 Reimplement more instruction and compiler logic 2025-02-08 17:36:30 -05:00
71a92c078b Add formatting disassembly output into JSON or TOML 2025-02-08 05:56:49 -05:00
ac11ad5674 Refactor instruction layout to allow for more type codes 2025-02-07 20:52:08 -05:00
8cc5661944 Begin rewriting tests 2025-02-07 15:37:48 -05:00
75d6948e82 Consolidate point instructions into return instructions 2025-02-06 14:34:31 -05:00
6f0955c29a Improve control flow register consolidation 2025-02-06 12:42:55 -05:00
4775d425a0 Implement typed registers with untyped constants 2025-02-05 19:12:26 -05:00
371a061b1c Consolidate local operations to point operations 2025-02-03 17:49:38 -05:00
ac1ee793ab Use fewer operations and encode operand types in the instruction 2025-01-13 09:49:08 -05:00
0510e18060 Begin implementing typed 64-bit instructions 2025-01-13 06:01:38 -05:00
de426d814a Add thread spawning and a random number generator 2025-01-09 19:56:36 -05:00
d9a0f6866b Consolidate Record type into the ThreadData type 2025-01-09 05:31:45 -05:00
e9bd9b37b0 Make runtime improvements 2025-01-08 04:21:01 -05:00
dc3cc13b12 Fix tests 2024-12-25 10:04:35 -05:00
71a68c54e4 Clean up 2024-12-21 13:20:57 -05:00
e2a462c3f6 Implement short-circuiting for logical operators; Organize compiler 2024-12-18 14:57:29 -05:00
72365cd399 Continue new VM implementation; Write docs 2024-12-17 16:31:32 -05:00
4527f7b6ef Continue thread-based VM refactor 2024-12-17 07:10:47 -05:00
bd590e0643 Begin VM conversion to multi-thread 2024-12-17 03:22:44 -05:00
9d544d789c Make more optimizations to the VM 2024-12-14 16:17:02 -05:00
ec5033a32f Continue VM optimizations 2024-12-14 08:49:02 -05:00
cd4fa6bef5 Optimize VM 2024-12-14 04:54:45 -05:00
9ae923febd Optimize; Revert to branch-style comparisons for performance 2024-12-14 00:45:49 -05:00
395f0af213 Use a lookup table instead of matching operation codes in the VM 2024-12-11 08:39:48 -05:00
85a706e0fb Make the disassembly prettier than ever before 2024-12-10 01:34:53 -05:00
98a7b7984a Continue refactor; Condense registers in logic chains 2024-12-09 08:27:45 -05:00
1c3c30ac21 Optimize with more SmallVecs 2024-12-04 13:31:02 -05:00
358436c470 Fix function parsing bug; Optimize strings 2024-12-04 06:38:24 -05:00
193653ff22 Add more optimizations to the VM 2024-12-04 05:10:53 -05:00
19c6a4d42a Fix a parsing bug; Add a benchmark for lua 2024-12-04 02:52:09 -05:00
95c811f3b5 Optimization experiments 2024-12-04 00:04:56 -05:00
544edaf5f4 Add new "add" tests; Allow adding strings to characters and visa versa 2024-12-03 14:12:40 -05:00
31a41581eb Add and rearrgange tests; Allow adding two characters into a string 2024-12-03 14:00:27 -05:00
77cb82b9fe Fix bugs with new instruction features 2024-11-29 10:44:35 -05:00
cc6a152f3c Refactor to use new instruction features 2024-11-28 05:02:51 -05:00
d83a470638 Begin fixing comiler to work with new instructions 2024-11-27 19:43:50 -05:00
e04ead3848 Refactor library and CLI 2024-11-17 20:32:53 -05:00
960931ce6e Begin wrapping up overhaul 2024-11-16 01:29:21 -05:00
7b91e879b7 Continue Value/VM overhaul 2024-11-15 21:42:27 -05:00
69458a138d Clean up 2024-11-15 19:19:31 -05:00
302bc9ce6c Continue Value/VM overhaul 2024-11-15 19:18:00 -05:00